A RRAM Integrated 4T SRAM with Self-Inhibit Resistive Switching Load by Pure CMOS Logic Process View Full Text


Ontology type: schema:ScholarlyArticle      Open Access: True


Article Info

DATE

2017-12

AUTHORS

Meng-Yin Hsu, Chu-Feng Liao, Yi-Hong Shih, Chrong Jung Lin, Ya-Chin King

ABSTRACT

This paper reports a novel full logic compatible 4T2R non-volatile static random access memory (nv-SRAM) featuring its self-inhibit data storing mechanism for in low-power/high-speed SRAM application. With compact cell area and full logic compatibility, this new nv-SRAM incorporates two STI-ReRAMs embedded inside the 4T SRAM. Data can be read/write through a cross-couple volatile structure for maintaining fast accessing speed. Data can be non-volatilely stored in new SRAM cell through a unique self-inhibit operation onto the resistive random access memory (RRAM) load, achieving zero static power during data hold. More... »

PAGES

418

Identifiers

URI

http://scigraph.springernature.com/pub.10.1186/s11671-017-2191-9

DOI

http://dx.doi.org/10.1186/s11671-017-2191-9

DIMENSIONS

https://app.dimensions.ai/details/publication/pub.1086044287

PUBMED

https://www.ncbi.nlm.nih.gov/pubmed/28622720


Indexing Status Check whether this publication has been indexed by Scopus and Web Of Science using the SN Indexing Status Tool
Incoming Citations Browse incoming citations for this publication using opencitations.net

JSON-LD is the canonical representation for SciGraph data.

TIP: You can open this SciGraph record using an external JSON-LD service: JSON-LD Playground Google SDTT

[
  {
    "@context": "https://springernature.github.io/scigraph/jsonld/sgcontext.json", 
    "about": [
      {
        "id": "http://purl.org/au-research/vocabulary/anzsrc-for/2008/0906", 
        "inDefinedTermSet": "http://purl.org/au-research/vocabulary/anzsrc-for/2008/", 
        "name": "Electrical and Electronic Engineering", 
        "type": "DefinedTerm"
      }, 
      {
        "id": "http://purl.org/au-research/vocabulary/anzsrc-for/2008/09", 
        "inDefinedTermSet": "http://purl.org/au-research/vocabulary/anzsrc-for/2008/", 
        "name": "Engineering", 
        "type": "DefinedTerm"
      }
    ], 
    "author": [
      {
        "affiliation": {
          "alternateName": "National Tsing Hua University", 
          "id": "https://www.grid.ac/institutes/grid.38348.34", 
          "name": [
            "Institute of Electronics Engineering, National Tsing Hua University, 300, Hsinchu, Taiwan"
          ], 
          "type": "Organization"
        }, 
        "familyName": "Hsu", 
        "givenName": "Meng-Yin", 
        "id": "sg:person.015767765173.13", 
        "sameAs": [
          "https://app.dimensions.ai/discover/publication?and_facet_researcher=ur.015767765173.13"
        ], 
        "type": "Person"
      }, 
      {
        "affiliation": {
          "alternateName": "National Tsing Hua University", 
          "id": "https://www.grid.ac/institutes/grid.38348.34", 
          "name": [
            "Institute of Electronics Engineering, National Tsing Hua University, 300, Hsinchu, Taiwan"
          ], 
          "type": "Organization"
        }, 
        "familyName": "Liao", 
        "givenName": "Chu-Feng", 
        "id": "sg:person.013400450262.29", 
        "sameAs": [
          "https://app.dimensions.ai/discover/publication?and_facet_researcher=ur.013400450262.29"
        ], 
        "type": "Person"
      }, 
      {
        "affiliation": {
          "alternateName": "National Tsing Hua University", 
          "id": "https://www.grid.ac/institutes/grid.38348.34", 
          "name": [
            "Institute of Electronics Engineering, National Tsing Hua University, 300, Hsinchu, Taiwan"
          ], 
          "type": "Organization"
        }, 
        "familyName": "Shih", 
        "givenName": "Yi-Hong", 
        "id": "sg:person.012042725153.35", 
        "sameAs": [
          "https://app.dimensions.ai/discover/publication?and_facet_researcher=ur.012042725153.35"
        ], 
        "type": "Person"
      }, 
      {
        "affiliation": {
          "alternateName": "National Tsing Hua University", 
          "id": "https://www.grid.ac/institutes/grid.38348.34", 
          "name": [
            "Institute of Electronics Engineering, National Tsing Hua University, 300, Hsinchu, Taiwan"
          ], 
          "type": "Organization"
        }, 
        "familyName": "Lin", 
        "givenName": "Chrong Jung", 
        "id": "sg:person.011321735670.02", 
        "sameAs": [
          "https://app.dimensions.ai/discover/publication?and_facet_researcher=ur.011321735670.02"
        ], 
        "type": "Person"
      }, 
      {
        "affiliation": {
          "alternateName": "National Tsing Hua University", 
          "id": "https://www.grid.ac/institutes/grid.38348.34", 
          "name": [
            "Institute of Electronics Engineering, National Tsing Hua University, 300, Hsinchu, Taiwan"
          ], 
          "type": "Organization"
        }, 
        "familyName": "King", 
        "givenName": "Ya-Chin", 
        "id": "sg:person.012465176243.66", 
        "sameAs": [
          "https://app.dimensions.ai/discover/publication?and_facet_researcher=ur.012465176243.66"
        ], 
        "type": "Person"
      }
    ], 
    "citation": [
      {
        "id": "https://doi.org/10.1109/tmag.2016.2624484", 
        "sameAs": [
          "https://app.dimensions.ai/details/publication/pub.1002465961"
        ], 
        "type": "CreativeWork"
      }, 
      {
        "id": "https://doi.org/10.1109/16.57140", 
        "sameAs": [
          "https://app.dimensions.ai/details/publication/pub.1061095435"
        ], 
        "type": "CreativeWork"
      }, 
      {
        "id": "https://doi.org/10.1109/jssc.2011.2148430", 
        "sameAs": [
          "https://app.dimensions.ai/details/publication/pub.1061330903"
        ], 
        "type": "CreativeWork"
      }, 
      {
        "id": "https://doi.org/10.1109/jssc.2013.2253412", 
        "sameAs": [
          "https://app.dimensions.ai/details/publication/pub.1061331399"
        ], 
        "type": "CreativeWork"
      }, 
      {
        "id": "https://doi.org/10.1109/led.2016.2578959", 
        "sameAs": [
          "https://app.dimensions.ai/details/publication/pub.1061357692"
        ], 
        "type": "CreativeWork"
      }, 
      {
        "id": "https://doi.org/10.1109/ted.2003.815862", 
        "sameAs": [
          "https://app.dimensions.ai/details/publication/pub.1061591053"
        ], 
        "type": "CreativeWork"
      }, 
      {
        "id": "https://doi.org/10.1109/ted.2016.2590433", 
        "sameAs": [
          "https://app.dimensions.ai/details/publication/pub.1061597629"
        ], 
        "type": "CreativeWork"
      }, 
      {
        "id": "https://doi.org/10.1109/tim.2010.2044710", 
        "sameAs": [
          "https://app.dimensions.ai/details/publication/pub.1061638351"
        ], 
        "type": "CreativeWork"
      }
    ], 
    "datePublished": "2017-12", 
    "datePublishedReg": "2017-12-01", 
    "description": "This paper reports a novel full logic compatible 4T2R non-volatile static random access memory (nv-SRAM) featuring its self-inhibit data storing mechanism for in low-power/high-speed SRAM application. With compact cell area and full logic compatibility, this new nv-SRAM incorporates two STI-ReRAMs embedded inside the 4T SRAM. Data can be read/write through a cross-couple volatile structure for maintaining fast accessing speed. Data can be non-volatilely stored in new SRAM cell through a unique self-inhibit operation onto the resistive random access memory (RRAM) load, achieving zero static power during data hold.", 
    "genre": "research_article", 
    "id": "sg:pub.10.1186/s11671-017-2191-9", 
    "inLanguage": [
      "en"
    ], 
    "isAccessibleForFree": true, 
    "isPartOf": [
      {
        "id": "sg:journal.1037280", 
        "issn": [
          "1931-7573", 
          "1556-276X"
        ], 
        "name": "Nanoscale Research Letters", 
        "type": "Periodical"
      }, 
      {
        "issueNumber": "1", 
        "type": "PublicationIssue"
      }, 
      {
        "type": "PublicationVolume", 
        "volumeNumber": "12"
      }
    ], 
    "name": "A RRAM Integrated 4T SRAM with Self-Inhibit Resistive Switching Load by Pure CMOS Logic Process", 
    "pagination": "418", 
    "productId": [
      {
        "name": "readcube_id", 
        "type": "PropertyValue", 
        "value": [
          "afcc87f5951acd4969550fe6bf288aa3262230161148b613602554d149ba6c17"
        ]
      }, 
      {
        "name": "pubmed_id", 
        "type": "PropertyValue", 
        "value": [
          "28622720"
        ]
      }, 
      {
        "name": "nlm_unique_id", 
        "type": "PropertyValue", 
        "value": [
          "101279750"
        ]
      }, 
      {
        "name": "doi", 
        "type": "PropertyValue", 
        "value": [
          "10.1186/s11671-017-2191-9"
        ]
      }, 
      {
        "name": "dimensions_id", 
        "type": "PropertyValue", 
        "value": [
          "pub.1086044287"
        ]
      }
    ], 
    "sameAs": [
      "https://doi.org/10.1186/s11671-017-2191-9", 
      "https://app.dimensions.ai/details/publication/pub.1086044287"
    ], 
    "sdDataset": "articles", 
    "sdDatePublished": "2019-04-11T10:34", 
    "sdLicense": "https://scigraph.springernature.com/explorer/license/", 
    "sdPublisher": {
      "name": "Springer Nature - SN SciGraph project", 
      "type": "Organization"
    }, 
    "sdSource": "s3://com-uberresearch-data-dimensions-target-20181106-alternative/cleanup/v134/2549eaecd7973599484d7c17b260dba0a4ecb94b/merge/v9/a6c9fde33151104705d4d7ff012ea9563521a3ce/jats-lookup/v90/0000000349_0000000349/records_113661_00000004.jsonl", 
    "type": "ScholarlyArticle", 
    "url": "https://link.springer.com/10.1186%2Fs11671-017-2191-9"
  }
]
 

Download the RDF metadata as:  json-ld nt turtle xml License info

HOW TO GET THIS DATA PROGRAMMATICALLY:

JSON-LD is a popular format for linked data which is fully compatible with JSON.

curl -H 'Accept: application/ld+json' 'https://scigraph.springernature.com/pub.10.1186/s11671-017-2191-9'

N-Triples is a line-based linked data format ideal for batch operations.

curl -H 'Accept: application/n-triples' 'https://scigraph.springernature.com/pub.10.1186/s11671-017-2191-9'

Turtle is a human-readable linked data format.

curl -H 'Accept: text/turtle' 'https://scigraph.springernature.com/pub.10.1186/s11671-017-2191-9'

RDF/XML is a standard XML format for linked data.

curl -H 'Accept: application/rdf+xml' 'https://scigraph.springernature.com/pub.10.1186/s11671-017-2191-9'


 

This table displays all metadata directly associated to this object as RDF triples.

121 TRIPLES      21 PREDICATES      37 URIs      21 LITERALS      9 BLANK NODES

Subject Predicate Object
1 sg:pub.10.1186/s11671-017-2191-9 schema:about anzsrc-for:09
2 anzsrc-for:0906
3 schema:author Nc5b70890a0fa47a78d28422b071e17e5
4 schema:citation https://doi.org/10.1109/16.57140
5 https://doi.org/10.1109/jssc.2011.2148430
6 https://doi.org/10.1109/jssc.2013.2253412
7 https://doi.org/10.1109/led.2016.2578959
8 https://doi.org/10.1109/ted.2003.815862
9 https://doi.org/10.1109/ted.2016.2590433
10 https://doi.org/10.1109/tim.2010.2044710
11 https://doi.org/10.1109/tmag.2016.2624484
12 schema:datePublished 2017-12
13 schema:datePublishedReg 2017-12-01
14 schema:description This paper reports a novel full logic compatible 4T2R non-volatile static random access memory (nv-SRAM) featuring its self-inhibit data storing mechanism for in low-power/high-speed SRAM application. With compact cell area and full logic compatibility, this new nv-SRAM incorporates two STI-ReRAMs embedded inside the 4T SRAM. Data can be read/write through a cross-couple volatile structure for maintaining fast accessing speed. Data can be non-volatilely stored in new SRAM cell through a unique self-inhibit operation onto the resistive random access memory (RRAM) load, achieving zero static power during data hold.
15 schema:genre research_article
16 schema:inLanguage en
17 schema:isAccessibleForFree true
18 schema:isPartOf N7b21d6a8c6104fdaa6089eca3fb50cc6
19 Na274809038ef486c817b97210e18879a
20 sg:journal.1037280
21 schema:name A RRAM Integrated 4T SRAM with Self-Inhibit Resistive Switching Load by Pure CMOS Logic Process
22 schema:pagination 418
23 schema:productId N1f058642a14e4dccb8830189424a7df6
24 N1fe8066dc1ae4d9f88c1cac9f180d0e2
25 N3063b55c5ca24e1682b1220775c5c30c
26 N312bb609ba7643c18871e11f454dbe74
27 Nbd470bce4d43464195cabc9ccd1269c0
28 schema:sameAs https://app.dimensions.ai/details/publication/pub.1086044287
29 https://doi.org/10.1186/s11671-017-2191-9
30 schema:sdDatePublished 2019-04-11T10:34
31 schema:sdLicense https://scigraph.springernature.com/explorer/license/
32 schema:sdPublisher Na6f38821d2d142f7b652a0286e718eea
33 schema:url https://link.springer.com/10.1186%2Fs11671-017-2191-9
34 sgo:license sg:explorer/license/
35 sgo:sdDataset articles
36 rdf:type schema:ScholarlyArticle
37 N10a95dc9255548b786585c499c2d14bd rdf:first sg:person.012042725153.35
38 rdf:rest Ncb6b774a0139493086f49247d5aeac0c
39 N1f058642a14e4dccb8830189424a7df6 schema:name readcube_id
40 schema:value afcc87f5951acd4969550fe6bf288aa3262230161148b613602554d149ba6c17
41 rdf:type schema:PropertyValue
42 N1fe8066dc1ae4d9f88c1cac9f180d0e2 schema:name dimensions_id
43 schema:value pub.1086044287
44 rdf:type schema:PropertyValue
45 N2f6f0204e2ce4c8bbfd4c5ce3e537058 rdf:first sg:person.013400450262.29
46 rdf:rest N10a95dc9255548b786585c499c2d14bd
47 N3063b55c5ca24e1682b1220775c5c30c schema:name pubmed_id
48 schema:value 28622720
49 rdf:type schema:PropertyValue
50 N312bb609ba7643c18871e11f454dbe74 schema:name doi
51 schema:value 10.1186/s11671-017-2191-9
52 rdf:type schema:PropertyValue
53 N7b21d6a8c6104fdaa6089eca3fb50cc6 schema:volumeNumber 12
54 rdf:type schema:PublicationVolume
55 Na274809038ef486c817b97210e18879a schema:issueNumber 1
56 rdf:type schema:PublicationIssue
57 Na6f38821d2d142f7b652a0286e718eea schema:name Springer Nature - SN SciGraph project
58 rdf:type schema:Organization
59 Nbd470bce4d43464195cabc9ccd1269c0 schema:name nlm_unique_id
60 schema:value 101279750
61 rdf:type schema:PropertyValue
62 Nc5b70890a0fa47a78d28422b071e17e5 rdf:first sg:person.015767765173.13
63 rdf:rest N2f6f0204e2ce4c8bbfd4c5ce3e537058
64 Ncb6b774a0139493086f49247d5aeac0c rdf:first sg:person.011321735670.02
65 rdf:rest Ne90edf7309574e8592833e5904137740
66 Ne90edf7309574e8592833e5904137740 rdf:first sg:person.012465176243.66
67 rdf:rest rdf:nil
68 anzsrc-for:09 schema:inDefinedTermSet anzsrc-for:
69 schema:name Engineering
70 rdf:type schema:DefinedTerm
71 anzsrc-for:0906 schema:inDefinedTermSet anzsrc-for:
72 schema:name Electrical and Electronic Engineering
73 rdf:type schema:DefinedTerm
74 sg:journal.1037280 schema:issn 1556-276X
75 1931-7573
76 schema:name Nanoscale Research Letters
77 rdf:type schema:Periodical
78 sg:person.011321735670.02 schema:affiliation https://www.grid.ac/institutes/grid.38348.34
79 schema:familyName Lin
80 schema:givenName Chrong Jung
81 schema:sameAs https://app.dimensions.ai/discover/publication?and_facet_researcher=ur.011321735670.02
82 rdf:type schema:Person
83 sg:person.012042725153.35 schema:affiliation https://www.grid.ac/institutes/grid.38348.34
84 schema:familyName Shih
85 schema:givenName Yi-Hong
86 schema:sameAs https://app.dimensions.ai/discover/publication?and_facet_researcher=ur.012042725153.35
87 rdf:type schema:Person
88 sg:person.012465176243.66 schema:affiliation https://www.grid.ac/institutes/grid.38348.34
89 schema:familyName King
90 schema:givenName Ya-Chin
91 schema:sameAs https://app.dimensions.ai/discover/publication?and_facet_researcher=ur.012465176243.66
92 rdf:type schema:Person
93 sg:person.013400450262.29 schema:affiliation https://www.grid.ac/institutes/grid.38348.34
94 schema:familyName Liao
95 schema:givenName Chu-Feng
96 schema:sameAs https://app.dimensions.ai/discover/publication?and_facet_researcher=ur.013400450262.29
97 rdf:type schema:Person
98 sg:person.015767765173.13 schema:affiliation https://www.grid.ac/institutes/grid.38348.34
99 schema:familyName Hsu
100 schema:givenName Meng-Yin
101 schema:sameAs https://app.dimensions.ai/discover/publication?and_facet_researcher=ur.015767765173.13
102 rdf:type schema:Person
103 https://doi.org/10.1109/16.57140 schema:sameAs https://app.dimensions.ai/details/publication/pub.1061095435
104 rdf:type schema:CreativeWork
105 https://doi.org/10.1109/jssc.2011.2148430 schema:sameAs https://app.dimensions.ai/details/publication/pub.1061330903
106 rdf:type schema:CreativeWork
107 https://doi.org/10.1109/jssc.2013.2253412 schema:sameAs https://app.dimensions.ai/details/publication/pub.1061331399
108 rdf:type schema:CreativeWork
109 https://doi.org/10.1109/led.2016.2578959 schema:sameAs https://app.dimensions.ai/details/publication/pub.1061357692
110 rdf:type schema:CreativeWork
111 https://doi.org/10.1109/ted.2003.815862 schema:sameAs https://app.dimensions.ai/details/publication/pub.1061591053
112 rdf:type schema:CreativeWork
113 https://doi.org/10.1109/ted.2016.2590433 schema:sameAs https://app.dimensions.ai/details/publication/pub.1061597629
114 rdf:type schema:CreativeWork
115 https://doi.org/10.1109/tim.2010.2044710 schema:sameAs https://app.dimensions.ai/details/publication/pub.1061638351
116 rdf:type schema:CreativeWork
117 https://doi.org/10.1109/tmag.2016.2624484 schema:sameAs https://app.dimensions.ai/details/publication/pub.1002465961
118 rdf:type schema:CreativeWork
119 https://www.grid.ac/institutes/grid.38348.34 schema:alternateName National Tsing Hua University
120 schema:name Institute of Electronics Engineering, National Tsing Hua University, 300, Hsinchu, Taiwan
121 rdf:type schema:Organization
 




Preview window. Press ESC to close (or click here)


...