Performance projections for ballistic carbon nanotube FinFET at circuit level View Full Text


Ontology type: schema:ScholarlyArticle     


Article Info

DATE

2016-06

AUTHORS

Panpan Zhang, Chenguang Qiu, Zhiyong Zhang, Li Ding, Bingyan Chen, Lianmao Peng

ABSTRACT

A novel three-dimensional device structure for a carbon nanotube (CNT) fin field-effect transistor (FinFET) is proposed and evaluated. We evaluated the potential of the CNT FinFET compared with a Si FinFET at a 22-nm node at the circuit level using three performance metrics including propagation delay, total power dissipation, and energy-delay product (EDP). Compared with a Si FinFET, the CNT FinFET presents obvious advantages in speed and EDP arising from its almost much larger current density but also results in a higher total power dissipation, especially at a low threshold voltage (Vth = 1/3Vdd). A suitable improvement in Vth can effectively contribute to a significant suppression of leakage current and power dissipation, and then an obvious optimization is obtained in the EDP with an acceptable sacrifice in speed. In particular, CNT FinFETs with optimized threshold voltages can provide an EDP advantage of approximately 50 times over Si FinFETs under a low supply voltage (Vdd = 0.4 V), suggesting great potential for CNT FinFET-based integrated circuits. More... »

PAGES

1785-1794

Journal

TITLE

Nano Research

ISSUE

6

VOLUME

9

Author Affiliations

Identifiers

URI

http://scigraph.springernature.com/pub.10.1007/s12274-016-1071-4

DOI

http://dx.doi.org/10.1007/s12274-016-1071-4

DIMENSIONS

https://app.dimensions.ai/details/publication/pub.1030480840


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45 schema:description A novel three-dimensional device structure for a carbon nanotube (CNT) fin field-effect transistor (FinFET) is proposed and evaluated. We evaluated the potential of the CNT FinFET compared with a Si FinFET at a 22-nm node at the circuit level using three performance metrics including propagation delay, total power dissipation, and energy-delay product (EDP). Compared with a Si FinFET, the CNT FinFET presents obvious advantages in speed and EDP arising from its almost much larger current density but also results in a higher total power dissipation, especially at a low threshold voltage (Vth = 1/3Vdd). A suitable improvement in Vth can effectively contribute to a significant suppression of leakage current and power dissipation, and then an obvious optimization is obtained in the EDP with an acceptable sacrifice in speed. In particular, CNT FinFETs with optimized threshold voltages can provide an EDP advantage of approximately 50 times over Si FinFETs under a low supply voltage (Vdd = 0.4 V), suggesting great potential for CNT FinFET-based integrated circuits.
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