Barrier layers for Cu ULSI metallization View Full Text


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Article Info

DATE

2001-04

AUTHORS

Yosi Shacham-Diamand

ABSTRACT

Barrier layers are integral parts of many metal interconnect systems. In this paper we review the current status of barrier layers for copper metallization for ultra-large-scale-integration (ULSI) technology for integrated circuits (ICs) manufacturing. The role of barrier layers is reviewed and the criteria that determine the process window, i.e. the optimum barrier thickness and the deposition processes, for their manufacturing are discussed. Various deposition methods are presented: physical vapor deposition (PVD), chemical vapor deposition (CVD), electrochemical deposition (ECD), electroless deposition (ELD), and atomic layer CVD (ALCVD) for barrier layers implementation. The barrier integration methods and the interaction between the barrier and the copper metallization are presented and discussed. Finally, the common inspection and metrology for barrier layer are critically reviewed. More... »

PAGES

336-344

Identifiers

URI

http://scigraph.springernature.com/pub.10.1007/s11664-001-0040-0

DOI

http://dx.doi.org/10.1007/s11664-001-0040-0

DIMENSIONS

https://app.dimensions.ai/details/publication/pub.1015695816


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[
  {
    "@context": "https://springernature.github.io/scigraph/jsonld/sgcontext.json", 
    "about": [
      {
        "id": "http://purl.org/au-research/vocabulary/anzsrc-for/2008/0910", 
        "inDefinedTermSet": "http://purl.org/au-research/vocabulary/anzsrc-for/2008/", 
        "name": "Manufacturing Engineering", 
        "type": "DefinedTerm"
      }, 
      {
        "id": "http://purl.org/au-research/vocabulary/anzsrc-for/2008/09", 
        "inDefinedTermSet": "http://purl.org/au-research/vocabulary/anzsrc-for/2008/", 
        "name": "Engineering", 
        "type": "DefinedTerm"
      }
    ], 
    "author": [
      {
        "affiliation": {
          "alternateName": "Tel Aviv University", 
          "id": "https://www.grid.ac/institutes/grid.12136.37", 
          "name": [
            "Department of Physical Electronics, Tel-Aviv University, 69978, Ramat-Aviv, Israel"
          ], 
          "type": "Organization"
        }, 
        "familyName": "Shacham-Diamand", 
        "givenName": "Yosi", 
        "id": "sg:person.01160765675.19", 
        "sameAs": [
          "https://app.dimensions.ai/discover/publication?and_facet_researcher=ur.01160765675.19"
        ], 
        "type": "Person"
      }
    ], 
    "citation": [
      {
        "id": "https://doi.org/10.1016/s0040-6090(96)08553-7", 
        "sameAs": [
          "https://app.dimensions.ai/details/publication/pub.1016126932"
        ], 
        "type": "CreativeWork"
      }, 
      {
        "id": "https://doi.org/10.1016/0040-6090(78)90184-0", 
        "sameAs": [
          "https://app.dimensions.ai/details/publication/pub.1022576951"
        ], 
        "type": "CreativeWork"
      }, 
      {
        "id": "https://doi.org/10.1016/0040-6090(78)90184-0", 
        "sameAs": [
          "https://app.dimensions.ai/details/publication/pub.1022576951"
        ], 
        "type": "CreativeWork"
      }, 
      {
        "id": "https://doi.org/10.1016/s0013-4686(99)00067-5", 
        "sameAs": [
          "https://app.dimensions.ai/details/publication/pub.1028937516"
        ], 
        "type": "CreativeWork"
      }, 
      {
        "id": "https://doi.org/10.1149/1.2069326", 
        "sameAs": [
          "https://app.dimensions.ai/details/publication/pub.1031566595"
        ], 
        "type": "CreativeWork"
      }, 
      {
        "id": "https://doi.org/10.1016/0169-4332(91)90288-u", 
        "sameAs": [
          "https://app.dimensions.ai/details/publication/pub.1037636086"
        ], 
        "type": "CreativeWork"
      }, 
      {
        "id": "https://doi.org/10.1063/1.352242", 
        "sameAs": [
          "https://app.dimensions.ai/details/publication/pub.1057967251"
        ], 
        "type": "CreativeWork"
      }, 
      {
        "id": "https://doi.org/10.1557/proc-514-281", 
        "sameAs": [
          "https://app.dimensions.ai/details/publication/pub.1067942045"
        ], 
        "type": "CreativeWork"
      }, 
      {
        "id": "https://doi.org/10.1109/iedm.1997.650496", 
        "sameAs": [
          "https://app.dimensions.ai/details/publication/pub.1094594463"
        ], 
        "type": "CreativeWork"
      }
    ], 
    "datePublished": "2001-04", 
    "datePublishedReg": "2001-04-01", 
    "description": "Barrier layers are integral parts of many metal interconnect systems. In this paper we review the current status of barrier layers for copper metallization for ultra-large-scale-integration (ULSI) technology for integrated circuits (ICs) manufacturing. The role of barrier layers is reviewed and the criteria that determine the process window, i.e. the optimum barrier thickness and the deposition processes, for their manufacturing are discussed. Various deposition methods are presented: physical vapor deposition (PVD), chemical vapor deposition (CVD), electrochemical deposition (ECD), electroless deposition (ELD), and atomic layer CVD (ALCVD) for barrier layers implementation. The barrier integration methods and the interaction between the barrier and the copper metallization are presented and discussed. Finally, the common inspection and metrology for barrier layer are critically reviewed.", 
    "genre": "research_article", 
    "id": "sg:pub.10.1007/s11664-001-0040-0", 
    "inLanguage": [
      "en"
    ], 
    "isAccessibleForFree": false, 
    "isPartOf": [
      {
        "id": "sg:journal.1136213", 
        "issn": [
          "0361-5235", 
          "1543-186X"
        ], 
        "name": "Journal of Electronic Materials", 
        "type": "Periodical"
      }, 
      {
        "issueNumber": "4", 
        "type": "PublicationIssue"
      }, 
      {
        "type": "PublicationVolume", 
        "volumeNumber": "30"
      }
    ], 
    "name": "Barrier layers for Cu ULSI metallization", 
    "pagination": "336-344", 
    "productId": [
      {
        "name": "readcube_id", 
        "type": "PropertyValue", 
        "value": [
          "4ac8a1cdb5b83e110c0c1252f4cbb3572f991f9583e34eb81ddc0281d2f25ce2"
        ]
      }, 
      {
        "name": "doi", 
        "type": "PropertyValue", 
        "value": [
          "10.1007/s11664-001-0040-0"
        ]
      }, 
      {
        "name": "dimensions_id", 
        "type": "PropertyValue", 
        "value": [
          "pub.1015695816"
        ]
      }
    ], 
    "sameAs": [
      "https://doi.org/10.1007/s11664-001-0040-0", 
      "https://app.dimensions.ai/details/publication/pub.1015695816"
    ], 
    "sdDataset": "articles", 
    "sdDatePublished": "2019-04-11T01:09", 
    "sdLicense": "https://scigraph.springernature.com/explorer/license/", 
    "sdPublisher": {
      "name": "Springer Nature - SN SciGraph project", 
      "type": "Organization"
    }, 
    "sdSource": "s3://com-uberresearch-data-dimensions-target-20181106-alternative/cleanup/v134/2549eaecd7973599484d7c17b260dba0a4ecb94b/merge/v9/a6c9fde33151104705d4d7ff012ea9563521a3ce/jats-lookup/v90/0000000001_0000000264/records_8697_00000521.jsonl", 
    "type": "ScholarlyArticle", 
    "url": "http://link.springer.com/10.1007%2Fs11664-001-0040-0"
  }
]
 

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This table displays all metadata directly associated to this object as RDF triples.

85 TRIPLES      21 PREDICATES      35 URIs      19 LITERALS      7 BLANK NODES

Subject Predicate Object
1 sg:pub.10.1007/s11664-001-0040-0 schema:about anzsrc-for:09
2 anzsrc-for:0910
3 schema:author N2a85add9c5294213b05a018213a19e41
4 schema:citation https://doi.org/10.1016/0040-6090(78)90184-0
5 https://doi.org/10.1016/0169-4332(91)90288-u
6 https://doi.org/10.1016/s0013-4686(99)00067-5
7 https://doi.org/10.1016/s0040-6090(96)08553-7
8 https://doi.org/10.1063/1.352242
9 https://doi.org/10.1109/iedm.1997.650496
10 https://doi.org/10.1149/1.2069326
11 https://doi.org/10.1557/proc-514-281
12 schema:datePublished 2001-04
13 schema:datePublishedReg 2001-04-01
14 schema:description Barrier layers are integral parts of many metal interconnect systems. In this paper we review the current status of barrier layers for copper metallization for ultra-large-scale-integration (ULSI) technology for integrated circuits (ICs) manufacturing. The role of barrier layers is reviewed and the criteria that determine the process window, i.e. the optimum barrier thickness and the deposition processes, for their manufacturing are discussed. Various deposition methods are presented: physical vapor deposition (PVD), chemical vapor deposition (CVD), electrochemical deposition (ECD), electroless deposition (ELD), and atomic layer CVD (ALCVD) for barrier layers implementation. The barrier integration methods and the interaction between the barrier and the copper metallization are presented and discussed. Finally, the common inspection and metrology for barrier layer are critically reviewed.
15 schema:genre research_article
16 schema:inLanguage en
17 schema:isAccessibleForFree false
18 schema:isPartOf N71920a8b1a0146c99019a2957ce4f3c1
19 Ncd0040ae1adc43168c7d8e165dc46bde
20 sg:journal.1136213
21 schema:name Barrier layers for Cu ULSI metallization
22 schema:pagination 336-344
23 schema:productId N0a7a84e5d9a5492cb453b23ec9f19c81
24 N2b85d143505e40a483679c04de6eebdd
25 N864ebfe6327b4c79be3b958efd579323
26 schema:sameAs https://app.dimensions.ai/details/publication/pub.1015695816
27 https://doi.org/10.1007/s11664-001-0040-0
28 schema:sdDatePublished 2019-04-11T01:09
29 schema:sdLicense https://scigraph.springernature.com/explorer/license/
30 schema:sdPublisher Nc95a2af50b2147f6a4f33a0389399b01
31 schema:url http://link.springer.com/10.1007%2Fs11664-001-0040-0
32 sgo:license sg:explorer/license/
33 sgo:sdDataset articles
34 rdf:type schema:ScholarlyArticle
35 N0a7a84e5d9a5492cb453b23ec9f19c81 schema:name readcube_id
36 schema:value 4ac8a1cdb5b83e110c0c1252f4cbb3572f991f9583e34eb81ddc0281d2f25ce2
37 rdf:type schema:PropertyValue
38 N2a85add9c5294213b05a018213a19e41 rdf:first sg:person.01160765675.19
39 rdf:rest rdf:nil
40 N2b85d143505e40a483679c04de6eebdd schema:name dimensions_id
41 schema:value pub.1015695816
42 rdf:type schema:PropertyValue
43 N71920a8b1a0146c99019a2957ce4f3c1 schema:volumeNumber 30
44 rdf:type schema:PublicationVolume
45 N864ebfe6327b4c79be3b958efd579323 schema:name doi
46 schema:value 10.1007/s11664-001-0040-0
47 rdf:type schema:PropertyValue
48 Nc95a2af50b2147f6a4f33a0389399b01 schema:name Springer Nature - SN SciGraph project
49 rdf:type schema:Organization
50 Ncd0040ae1adc43168c7d8e165dc46bde schema:issueNumber 4
51 rdf:type schema:PublicationIssue
52 anzsrc-for:09 schema:inDefinedTermSet anzsrc-for:
53 schema:name Engineering
54 rdf:type schema:DefinedTerm
55 anzsrc-for:0910 schema:inDefinedTermSet anzsrc-for:
56 schema:name Manufacturing Engineering
57 rdf:type schema:DefinedTerm
58 sg:journal.1136213 schema:issn 0361-5235
59 1543-186X
60 schema:name Journal of Electronic Materials
61 rdf:type schema:Periodical
62 sg:person.01160765675.19 schema:affiliation https://www.grid.ac/institutes/grid.12136.37
63 schema:familyName Shacham-Diamand
64 schema:givenName Yosi
65 schema:sameAs https://app.dimensions.ai/discover/publication?and_facet_researcher=ur.01160765675.19
66 rdf:type schema:Person
67 https://doi.org/10.1016/0040-6090(78)90184-0 schema:sameAs https://app.dimensions.ai/details/publication/pub.1022576951
68 rdf:type schema:CreativeWork
69 https://doi.org/10.1016/0169-4332(91)90288-u schema:sameAs https://app.dimensions.ai/details/publication/pub.1037636086
70 rdf:type schema:CreativeWork
71 https://doi.org/10.1016/s0013-4686(99)00067-5 schema:sameAs https://app.dimensions.ai/details/publication/pub.1028937516
72 rdf:type schema:CreativeWork
73 https://doi.org/10.1016/s0040-6090(96)08553-7 schema:sameAs https://app.dimensions.ai/details/publication/pub.1016126932
74 rdf:type schema:CreativeWork
75 https://doi.org/10.1063/1.352242 schema:sameAs https://app.dimensions.ai/details/publication/pub.1057967251
76 rdf:type schema:CreativeWork
77 https://doi.org/10.1109/iedm.1997.650496 schema:sameAs https://app.dimensions.ai/details/publication/pub.1094594463
78 rdf:type schema:CreativeWork
79 https://doi.org/10.1149/1.2069326 schema:sameAs https://app.dimensions.ai/details/publication/pub.1031566595
80 rdf:type schema:CreativeWork
81 https://doi.org/10.1557/proc-514-281 schema:sameAs https://app.dimensions.ai/details/publication/pub.1067942045
82 rdf:type schema:CreativeWork
83 https://www.grid.ac/institutes/grid.12136.37 schema:alternateName Tel Aviv University
84 schema:name Department of Physical Electronics, Tel-Aviv University, 69978, Ramat-Aviv, Israel
85 rdf:type schema:Organization
 




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