FPGA realizations of high-speed switching-type chaotic oscillators using compact VHDL codes View Full Text


Ontology type: schema:ScholarlyArticle     


Article Info

DATE

2018-07

AUTHORS

Talal Bonny, Ahmed S. Elwakil

ABSTRACT

This paper introduces high-speed FPGA implementations of two different chaotic systems that rely on a switching-type nonlinearity. In particular, the single-switch Jerk system and the two-wing butterfly system (previously implemented only in analog form) are realized on a modular FPGA platform. For each system, two different hardware architectures are described: a parameters-independent architecture and a customized one with fixed parameters that utilizes less FPGA resources and thus has high throughput with the minimum number of clock cycles. Experimental results show that the parameters-independent architecture utilizes 70% more of the FPGA resources, while the customized one achieves a maximum clock frequency 172.5 MHz for the Jerk and 142.6 MHz for the two-wing system. More... »

PAGES

819-833

Identifiers

URI

http://scigraph.springernature.com/pub.10.1007/s11071-018-4229-7

DOI

http://dx.doi.org/10.1007/s11071-018-4229-7

DIMENSIONS

https://app.dimensions.ai/details/publication/pub.1101794266


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142 https://www.grid.ac/institutes/grid.440877.8 schema:alternateName Nile University
143 schema:name Department of Electrical and Computer Engineering, College of Engineering, University of Sharjah, PO Box 27272, Sharjah, United Arab Emirates
144 Nanoelectronics Integrated Systems Center (NISC), Nile University, Cairo, Egypt
145 rdf:type schema:Organization
 




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