Ontology type: schema:ScholarlyArticle
2021-11-12
AUTHORSSabitabrata Bhattacharya, Suman Lata Tripathi, Vikram Kumar Kamboj
ABSTRACTAn improved Chimps optimizer algorithm is proposed in this paper and is applied for the performance optimization of tunnel FET architectures for use in low power VLSI circuits. The steep subthreshold characteristics of TFET improves device performance and make it suitable for low power digital and memory applications. Classical Chimps optimizer has poor convergence and problem to stuck into local minima for high dimensional problems. This research focuses on mathematical model of divergent thinking and sensual movement of chimps in four different forms named attacker, barrier, chaser, and driver for simulation. The improved variant of Chimps optimizer has been proposed in this research and named as Imp-Chimp. To validate the efficacy and feasibility of the suggested technique, it has been examined for standard benchmarks and multidisciplinary engineering design problems to solve non-convex, non-linear, and typical engineering design problems. The suggested technique variants have been evaluated for seven standard unimodal benchmark functions, six standard multi modal benchmark functions, ten standard fixed dimension benchmark functions and engineering design problems (i. e., TFET, BTBT). The outcomes of this method have been compared with other existing optimization methods considering convergence speed as well as for searching local and global optimal solutions. The testing results show the better performance of the proposed method. The paper also demonstrates the tunnel field effect transistor (TFET) as a promising device for low power electronic circuits and an engineering problem where the Imp-Chimp optimizer can be implemented for performance improvement. The TFET is based on the carrier generation using the quantum mechanical process of the band-to-band tunneling (BTBT). TFET can meet the requirements of a device that can perform on low supply voltage with reduced leakage currents and low sub-threshold swing. TFET can be optimized to give similar performance as MOSFET, but with much lower power consumption. More... »
PAGES1-44
http://scigraph.springernature.com/pub.10.1007/s00366-021-01530-4
DOIhttp://dx.doi.org/10.1007/s00366-021-01530-4
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