SORU: A Reconfigurable Vector Unit for Adaptable Embedded Systems View Full Text


Ontology type: schema:Chapter     


Chapter Info

DATE

2009

AUTHORS

José M. Moya , Javier Rodríguez , Julio Martín , Juan Carlos Vallejo , Pedro Malagón , Álvaro Araujo , Juan-Mariano de Goyeneche , Agustín Rubio , Elena Romero , Daniel Villanueva , Octavio Nieto-Taladriz , Carlos A. López Barrio

ABSTRACT

In this article we describe SORU, a reconfigurable instruction set processor architecture (RISP) specially designed for run-time self-adaptation in environments with tight resource and power restrictions. It allows to accelerate computationally intensive multimedia processing on portable/embedded devices while maintaining a low energy consumption. The experimental results show a mean speedup of 4 with half the energy consumption. The main datapath can be left in a hibernate state during more than 75% of the execution time in our experiments, what leads also to a significant reduction of energy consumption in the I-cache and the main datapath, including the register file. More... »

PAGES

255-260

References to SciGraph publications

  • 2005. Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems in HIGH PERFORMANCE EMBEDDED ARCHITECTURES AND COMPILERS
  • Book

    TITLE

    Reconfigurable Computing: Architectures, Tools and Applications

    ISBN

    978-3-642-00640-1
    978-3-642-00641-8

    Author Affiliations

    Identifiers

    URI

    http://scigraph.springernature.com/pub.10.1007/978-3-642-00641-8_25

    DOI

    http://dx.doi.org/10.1007/978-3-642-00641-8_25

    DIMENSIONS

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