Revisiting Resistance Speeds Up I/O-Efficient LTL Model Checking View Full Text


Ontology type: schema:Chapter      Open Access: True


Chapter Info

DATE

2008-01-01

AUTHORS

J. Barnat , L. Brim , P. Šimeček , M. Weber

ABSTRACT

Revisiting resistant graph algorithms are those, whose correctness is not vulnerable to repeated edge exploration. Revisiting resistant I/O efficient graph algorithms exhibit considerable speed-up in practice in comparison to non-revisiting resistant algorithms. In the paper we present a new revisiting resistant I/O efficient LTL model checking algorithm. We analyze its theoretical I/O complexity and we experimentally compare its performance to already existing I/O efficient LTL model checking algorithms. More... »

PAGES

48-62

Book

TITLE

Tools and Algorithms for the Construction and Analysis of Systems

ISBN

978-3-540-78799-0
978-3-540-78800-3

Identifiers

URI

http://scigraph.springernature.com/pub.10.1007/978-3-540-78800-3_5

DOI

http://dx.doi.org/10.1007/978-3-540-78800-3_5

DIMENSIONS

https://app.dimensions.ai/details/publication/pub.1026614612


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