L0 Cluster Synthesis and Operation Shuffling View Full Text


Ontology type: schema:Chapter     


Chapter Info

DATE

2004

AUTHORS

Murali Jayapala , Tom Vander Aa , Francisco Barat , Francky Catthoor , Henk Corporaal , Geert Deconinck

ABSTRACT

Clustered L0 buffers are an interesting alternative for reducing energy consumption in the instruction memory hierarchy of embedded VLIW processors. Currently, the synthesis of L0 clusters is performed as an hardware optimization, where the compiler generates a schedule and based on the given schedule L0 clusters are synthesized. The result of clustering is schedule dependent, which offers a design space for exploring the effects on clustering by scheduling. This paper presents a study indicating the potentials offered by shuffling operations within a VLIW instruction on L0 cluster synthesis. The simulation results indicate that potentially up to 75% of L0 buffer energy can be reduced by shuffling operations. More... »

PAGES

311-321

References to SciGraph publications

Book

TITLE

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation

ISBN

978-3-540-23095-3
978-3-540-30205-6

Identifiers

URI

http://scigraph.springernature.com/pub.10.1007/978-3-540-30205-6_33

DOI

http://dx.doi.org/10.1007/978-3-540-30205-6_33

DIMENSIONS

https://app.dimensions.ai/details/publication/pub.1023481928


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