Parallel Implementations of LEA View Full Text


Ontology type: schema:Chapter     


Chapter Info

DATE

2014

AUTHORS

Hwajeong Seo , Zhe Liu , Taehwan Park , Hyunjin Kim , Yeoncheol Lee , Jongseok Choi , Howon Kim

ABSTRACT

LEA is a new lightweight and low-power encryption algorithm. This algorithm has a certain useful features which are especially suitable for parallel hardware and software implementations, i.e., simple ARX operations, non-S-BOX architecture, and 32-bit word size. In this paper we evaluate the performance of the LEA algorithm on ARM-NEON and GPUs by taking advantage of both the desirable features of LEA and a parallel computing platform and programming model by NEON and CUDA. Specifically, we propose novel parallel LEA implementations on representative SIMT and SIMD architectures such as CUDA and NEON. In case of CUDA, we firstly designed a thread-based computation model to fall into functional parallelism by computing several encryptions over one thread. To alleviate the memory transfer delay, we allocate memory to satisfy coalescing memory access. Secondly our method is block cipher implementation written in assembly language, which provides efficient and flexible programming environments. With these optimization techniques, we achieved 17.352 and 2.5 GBps (bytes per second) throughput without/with memory transfer. In case of NEON, we adopted pipeline instructions and SIMD-based execution models, which enhanced encryption by 49.85 % compared to previous ARM implementations. More... »

PAGES

256-274

References to SciGraph publications

Book

TITLE

Information Security and Cryptology -- ICISC 2013

ISBN

978-3-319-12159-8
978-3-319-12160-4

Identifiers

URI

http://scigraph.springernature.com/pub.10.1007/978-3-319-12160-4_16

DOI

http://dx.doi.org/10.1007/978-3-319-12160-4_16

DIMENSIONS

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