Memristor Emulators View Full Text


Ontology type: schema:Chapter     


Chapter Info

DATE

2014

AUTHORS

Dalibor Biolek

ABSTRACT

There are three possible stages of exploring the memristor as the fourth fundamental circuit element: 1. Generation of the model, 2. Simulation of the element behavior with the aid of the model, and 3. Hardware emulation of the memristor. This Chapter deals with the third stage, describing circuit ideas of memristor emulators for practical laboratory experiments. More... »

PAGES

487-503

Identifiers

URI

http://scigraph.springernature.com/pub.10.1007/978-3-319-02630-5_22

DOI

http://dx.doi.org/10.1007/978-3-319-02630-5_22

DIMENSIONS

https://app.dimensions.ai/details/publication/pub.1029542228


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[
  {
    "@context": "https://springernature.github.io/scigraph/jsonld/sgcontext.json", 
    "about": [
      {
        "id": "http://purl.org/au-research/vocabulary/anzsrc-for/2008/08", 
        "inDefinedTermSet": "http://purl.org/au-research/vocabulary/anzsrc-for/2008/", 
        "name": "Information and Computing Sciences", 
        "type": "DefinedTerm"
      }, 
      {
        "id": "http://purl.org/au-research/vocabulary/anzsrc-for/2008/0801", 
        "inDefinedTermSet": "http://purl.org/au-research/vocabulary/anzsrc-for/2008/", 
        "name": "Artificial Intelligence and Image Processing", 
        "type": "DefinedTerm"
      }
    ], 
    "author": [
      {
        "affiliation": {
          "alternateName": "Dept. of Electrical Engineering/Microelectronics, University of Defence/Brno University of Technology, Brno, Czech Republic", 
          "id": "http://www.grid.ac/institutes/None", 
          "name": [
            "Dept. of Electrical Engineering/Microelectronics, University of Defence/Brno University of Technology, Brno, Czech Republic"
          ], 
          "type": "Organization"
        }, 
        "familyName": "Biolek", 
        "givenName": "Dalibor", 
        "id": "sg:person.015143331665.54", 
        "sameAs": [
          "https://app.dimensions.ai/discover/publication?and_facet_researcher=ur.015143331665.54"
        ], 
        "type": "Person"
      }
    ], 
    "datePublished": "2014", 
    "datePublishedReg": "2014-01-01", 
    "description": "There are three possible stages of exploring the memristor as the fourth fundamental circuit element: 1. Generation of the model, 2. Simulation of the element behavior with the aid of the model, and 3. Hardware emulation of the memristor. This Chapter deals with the third stage, describing circuit ideas of memristor emulators for practical laboratory experiments.", 
    "editor": [
      {
        "familyName": "Adamatzky", 
        "givenName": "Andrew", 
        "type": "Person"
      }, 
      {
        "familyName": "Chua", 
        "givenName": "Leon", 
        "type": "Person"
      }
    ], 
    "genre": "chapter", 
    "id": "sg:pub.10.1007/978-3-319-02630-5_22", 
    "inLanguage": "en", 
    "isAccessibleForFree": false, 
    "isPartOf": {
      "isbn": [
        "978-3-319-02629-9", 
        "978-3-319-02630-5"
      ], 
      "name": "Memristor Networks", 
      "type": "Book"
    }, 
    "keywords": [
      "practical laboratory experiments", 
      "fourth fundamental circuit element", 
      "hardware emulation", 
      "laboratory experiments", 
      "circuit elements", 
      "element behavior", 
      "fundamental circuit element", 
      "emulator", 
      "memristor emulator", 
      "memristor", 
      "simulations", 
      "third stage", 
      "model", 
      "possible stage", 
      "behavior", 
      "emulation", 
      "generation", 
      "experiments", 
      "elements", 
      "stage", 
      "aid", 
      "chapter", 
      "idea", 
      "circuit ideas"
    ], 
    "name": "Memristor Emulators", 
    "pagination": "487-503", 
    "productId": [
      {
        "name": "dimensions_id", 
        "type": "PropertyValue", 
        "value": [
          "pub.1029542228"
        ]
      }, 
      {
        "name": "doi", 
        "type": "PropertyValue", 
        "value": [
          "10.1007/978-3-319-02630-5_22"
        ]
      }
    ], 
    "publisher": {
      "name": "Springer Nature", 
      "type": "Organisation"
    }, 
    "sameAs": [
      "https://doi.org/10.1007/978-3-319-02630-5_22", 
      "https://app.dimensions.ai/details/publication/pub.1029542228"
    ], 
    "sdDataset": "chapters", 
    "sdDatePublished": "2021-12-01T20:04", 
    "sdLicense": "https://scigraph.springernature.com/explorer/license/", 
    "sdPublisher": {
      "name": "Springer Nature - SN SciGraph project", 
      "type": "Organization"
    }, 
    "sdSource": "s3://com-springernature-scigraph/baseset/20211201/entities/gbq_results/chapter/chapter_3.jsonl", 
    "type": "Chapter", 
    "url": "https://doi.org/10.1007/978-3-319-02630-5_22"
  }
]
 

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This table displays all metadata directly associated to this object as RDF triples.

89 TRIPLES      23 PREDICATES      49 URIs      42 LITERALS      7 BLANK NODES

Subject Predicate Object
1 sg:pub.10.1007/978-3-319-02630-5_22 schema:about anzsrc-for:08
2 anzsrc-for:0801
3 schema:author N96d150154330429f8a6dc2a4ca834a9f
4 schema:datePublished 2014
5 schema:datePublishedReg 2014-01-01
6 schema:description There are three possible stages of exploring the memristor as the fourth fundamental circuit element: 1. Generation of the model, 2. Simulation of the element behavior with the aid of the model, and 3. Hardware emulation of the memristor. This Chapter deals with the third stage, describing circuit ideas of memristor emulators for practical laboratory experiments.
7 schema:editor Nbf2f84c208c6497d84d4bd2da6b620e9
8 schema:genre chapter
9 schema:inLanguage en
10 schema:isAccessibleForFree false
11 schema:isPartOf N9beb101f2b8a4ddf8ca1a35ab36c57e1
12 schema:keywords aid
13 behavior
14 chapter
15 circuit elements
16 circuit ideas
17 element behavior
18 elements
19 emulation
20 emulator
21 experiments
22 fourth fundamental circuit element
23 fundamental circuit element
24 generation
25 hardware emulation
26 idea
27 laboratory experiments
28 memristor
29 memristor emulator
30 model
31 possible stage
32 practical laboratory experiments
33 simulations
34 stage
35 third stage
36 schema:name Memristor Emulators
37 schema:pagination 487-503
38 schema:productId N115a8990393144498588611641805abf
39 N83159e017d4b4bee8d3c024eaa7964e5
40 schema:publisher Na3b38eaee78241c091dd3cd432bf3187
41 schema:sameAs https://app.dimensions.ai/details/publication/pub.1029542228
42 https://doi.org/10.1007/978-3-319-02630-5_22
43 schema:sdDatePublished 2021-12-01T20:04
44 schema:sdLicense https://scigraph.springernature.com/explorer/license/
45 schema:sdPublisher Na96073ed3b704a96b3445b6914a5dc0f
46 schema:url https://doi.org/10.1007/978-3-319-02630-5_22
47 sgo:license sg:explorer/license/
48 sgo:sdDataset chapters
49 rdf:type schema:Chapter
50 N115a8990393144498588611641805abf schema:name dimensions_id
51 schema:value pub.1029542228
52 rdf:type schema:PropertyValue
53 N518c631c789d4ff3a0076fbe7a6d04b5 rdf:first Na8e0f5ef0ffa4bbda8e6ec089dbcfb95
54 rdf:rest rdf:nil
55 N83159e017d4b4bee8d3c024eaa7964e5 schema:name doi
56 schema:value 10.1007/978-3-319-02630-5_22
57 rdf:type schema:PropertyValue
58 N96d150154330429f8a6dc2a4ca834a9f rdf:first sg:person.015143331665.54
59 rdf:rest rdf:nil
60 N9beb101f2b8a4ddf8ca1a35ab36c57e1 schema:isbn 978-3-319-02629-9
61 978-3-319-02630-5
62 schema:name Memristor Networks
63 rdf:type schema:Book
64 Na3b38eaee78241c091dd3cd432bf3187 schema:name Springer Nature
65 rdf:type schema:Organisation
66 Na8e0f5ef0ffa4bbda8e6ec089dbcfb95 schema:familyName Chua
67 schema:givenName Leon
68 rdf:type schema:Person
69 Na96073ed3b704a96b3445b6914a5dc0f schema:name Springer Nature - SN SciGraph project
70 rdf:type schema:Organization
71 Nbf2f84c208c6497d84d4bd2da6b620e9 rdf:first Ncb5438b3996648e3a1ee4e5daba71098
72 rdf:rest N518c631c789d4ff3a0076fbe7a6d04b5
73 Ncb5438b3996648e3a1ee4e5daba71098 schema:familyName Adamatzky
74 schema:givenName Andrew
75 rdf:type schema:Person
76 anzsrc-for:08 schema:inDefinedTermSet anzsrc-for:
77 schema:name Information and Computing Sciences
78 rdf:type schema:DefinedTerm
79 anzsrc-for:0801 schema:inDefinedTermSet anzsrc-for:
80 schema:name Artificial Intelligence and Image Processing
81 rdf:type schema:DefinedTerm
82 sg:person.015143331665.54 schema:affiliation grid-institutes:None
83 schema:familyName Biolek
84 schema:givenName Dalibor
85 schema:sameAs https://app.dimensions.ai/discover/publication?and_facet_researcher=ur.015143331665.54
86 rdf:type schema:Person
87 grid-institutes:None schema:alternateName Dept. of Electrical Engineering/Microelectronics, University of Defence/Brno University of Technology, Brno, Czech Republic
88 schema:name Dept. of Electrical Engineering/Microelectronics, University of Defence/Brno University of Technology, Brno, Czech Republic
89 rdf:type schema:Organization
 




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