Enrico Macii


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Person Info

NAME

Enrico

SURNAME

Macii

Publications in SciGraph latest 50 shown

  • 2017-03-31 PVInGrid: A Distributed Infrastructure for Evaluating the Integration of Photovoltaic Systems in Smart Grid in TECHNOLOGICAL INNOVATION FOR SMART SYSTEMS
  • 2017 Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping in VLSI-SOC: SYSTEM-ON-CHIP IN THE NANOSCALE ERA – DESIGN, VERIFICATION AND RELIABILITY
  • 2017 Logic Synthesis for Silicon and Beyond-Silicon Multi-gate Pass-Logic Circuits in VLSI-SOC: SYSTEM-ON-CHIP IN THE NANOSCALE ERA – DESIGN, VERIFICATION AND RELIABILITY
  • 2016 A Temperature-Aware Battery Cycle Life Model for Different Battery Chemistries in VLSI-SOC: DESIGN FOR RELIABILITY, SECURITY, AND LOW POWER
  • 2016 Modeling and Simulation of the Power Flow in Smart Systems in SMART SYSTEMS INTEGRATION AND SIMULATION
  • 2016 Energy-Efficient Digital Processing via Approximate Computing in SMART SYSTEMS INTEGRATION AND SIMULATION
  • 2016 Smart Electronic Systems: An Overview in SMART SYSTEMS INTEGRATION AND SIMULATION
  • 2015 Power-Gating for Leakage Control and Beyond in CIRCUIT DESIGN FOR RELIABILITY
  • 2015 DIMCloud: A Distributed Framework for District Energy Simulation and Management in INTERNET OF THINGS. USER-CENTRIC IOT
  • 2014-06 Modeling of Physical Defects in PN Junction Based Graphene Devices in JOURNAL OF ELECTRONIC TESTING
  • 2014 A Preliminary Analysis on HEp-2 Pattern Classification: Evaluating Strategies Based on Support Vector Machines and Subclass Discriminant Analysis in BIOMEDICAL ENGINEERING SYSTEMS AND TECHNOLOGIES
  • 2013-11 Energy saving in existing buildings by an intelligent use of interoperable ICTs in ENERGY EFFICIENCY
  • 2013 Improving Latent Semantic Analysis of Biomedical Literature Integrating UMLS Metathesaurus and Biomedical Pathways Databases in BIOMEDICAL ENGINEERING SYSTEMS AND TECHNOLOGIES
  • 2013 On-Chip NBTI and PBTI Tracking through an All-Digital Aging Monitor Architecture in INTEGRATED CIRCUIT AND SYSTEM DESIGN. POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION
  • 2011-12 miREE: miRNA recognition elements ensemble in BMC BIOINFORMATICS
  • 2011-11 A molecular dynamics study of a miRNA:mRNA interaction in JOURNAL OF MOLECULAR MODELING
  • 2011-09-08 Adaptive Task Migration Policies for Thermal Control in MPSoCs in VLSI 2010 ANNUAL SYMPOSIUM
  • 2011 Sub-Row Sleep Transistor Insertion for Concurrent Clock-Gating and Power-Gating in INTEGRATED CIRCUIT AND SYSTEM DESIGN. POWER AND TIMING MODELING, OPTIMIZATION, AND SIMULATION
  • 2011 An On-Chip All-Digital PV-Monitoring Architecture for Digital IPs in INTEGRATED CIRCUIT AND SYSTEM DESIGN. POWER AND TIMING MODELING, OPTIMIZATION, AND SIMULATION
  • 2010 On-chip Thermal Modeling Based on SPICE Simulation in INTEGRATED CIRCUIT AND SYSTEM DESIGN. POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION
  • 2010 Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering in INTEGRATED CIRCUIT AND SYSTEM DESIGN. POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION
  • 2010 Data-Driven Clock Gating for Digital Filters in INTEGRATED CIRCUIT AND SYSTEM DESIGN. POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION
  • 2009 Temporal Discharge Current Driven Clustering for Improved Leakage Power Reduction in Row-Based Power-Gating in INTEGRATED CIRCUIT AND SYSTEM DESIGN. POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION
  • 2008 Address Bus Encoding Techniques for System-Level Power Optimization in DESIGN, AUTOMATION, AND TEST IN EUROPE
  • 2008 Automated Discrimination of Pathological Regions in Tissue Images: Unsupervised Clustering vs. Supervised SVM Classification in BIOMEDICAL ENGINEERING SYSTEMS AND TECHNOLOGIES
  • 2008 Modeling, Simulation and Run-Time Management in DESIGN, AUTOMATION, AND TEST IN EUROPE
  • 2007 New Adaptive Encoding Schemes for Switching Activity Balancing in On-Chip Buses in INTEGRATED CIRCUIT AND SYSTEM DESIGN. POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION
  • 2006 Dynamic Management of Thermally-Induced Clock Skew: An Implementation Perspective in INTEGRATED CIRCUIT AND SYSTEM DESIGN. POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION
  • 2005 Energy-Aware System-on-Chip for 5 GHz Wireless LANs in INTEGRATED CIRCUIT AND SYSTEM DESIGN. POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION
  • 2005 Design and Implementation of a Memory Generator for Low-Energy Application-Specific Block-Enabled SRAMs in INTEGRATED CIRCUIT AND SYSTEM DESIGN. POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION
  • 2005 Exploiting Cross-Channel Correlation for Energy-Efficient LCD Bus Encoding in INTEGRATED CIRCUIT AND SYSTEM DESIGN. POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION
  • 2005 Energy-Efficient Value-Based Selective Refresh for Embedded DRAMs in INTEGRATED CIRCUIT AND SYSTEM DESIGN. POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION
  • 2004 A Low-Power Encoding Scheme for GigaByte Video Interfaces in INTEGRATED CIRCUIT AND SYSTEM DESIGN. POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION
  • 2003 Statistical Power Estimation of Behavioral Descriptions in INTEGRATED CIRCUIT AND SYSTEM DESIGN. POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION
  • 2002 Offine Data Profiling Techniques to Enhance Memory Compression in Embedded Systems in INTEGRATED CIRCUIT DESIGN. POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION
  • 2000 RTL Estimation of Steering Logic Power in INTEGRATED CIRCUIT DESIGN
  • 2000 Power Models for Semi-autonomous RTL Macros in INTEGRATED CIRCUIT DESIGN
  • 1997-04 Algebric Decision Diagrams and Their Applications in FORMAL METHODS IN SYSTEM DESIGN
  • 1997 High-Level Synthesis for Low Power in LOW POWER DESIGN IN DEEP SUBMICRON ELECTRONICS
  • 1997 RT and Algorithmic-Level Optimization for Low Power in LOW POWER DESIGN IN DEEP SUBMICRON ELECTRONICS
  • 1997 Sequential Synthesis and Optimization for Low Power in LOW POWER DESIGN IN DEEP SUBMICRON ELECTRONICS
  • 1994-02 A test generation program for sequential circuits in JOURNAL OF ELECTRONIC TESTING
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