Accurate sample latch offset compensation scheme


Ontology type: sgo:Patent     


Patent Info

DATE

N/A

AUTHORS

Minhan Chen , Kenneth Luis Arcudia

ABSTRACT

A receiver according to one aspect comprises a latch configured to sample a data signal according to a sampling clock signal, and a plurality of offset-compensation segments, wherein each of the segments is coupled to an internal node of the latch. Each of the segments comprises a compensation transistor, and a step-adjustment transistor coupled in series with the compensation transistor. The receiver further comprises an offset controller configured to selectively turn on one or more of the compensations transistors to reduce an offset voltage of the latch, and a bias circuit configured to apply a bias voltage to a gate of each of one or more of the step-adjustment transistors. More... »

Related SciGraph Publications

  • 2014-12. A digitally calibrated dynamic comparator using time-domain offset detection in ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
  • JSON-LD is the canonical representation for SciGraph data.

    TIP: You can open this SciGraph record using an external JSON-LD service: JSON-LD Playground Google SDTT

    [
      {
        "@context": "https://springernature.github.io/scigraph/jsonld/sgcontext.json", 
        "about": [
          {
            "id": "http://purl.org/au-research/vocabulary/anzsrc-for/2008/2867", 
            "inDefinedTermSet": "http://purl.org/au-research/vocabulary/anzsrc-for/2008/", 
            "type": "DefinedTerm"
          }
        ], 
        "author": [
          {
            "name": "Minhan Chen", 
            "type": "Person"
          }, 
          {
            "name": "Kenneth Luis Arcudia", 
            "type": "Person"
          }
        ], 
        "citation": [
          {
            "id": "sg:pub.10.1007/s10470-014-0410-1", 
            "sameAs": [
              "https://app.dimensions.ai/details/publication/pub.1034317794", 
              "https://doi.org/10.1007/s10470-014-0410-1"
            ], 
            "type": "CreativeWork"
          }, 
          {
            "id": "https://doi.org/10.1109/jssc.2013.2274904", 
            "sameAs": [
              "https://app.dimensions.ai/details/publication/pub.1061331496"
            ], 
            "type": "CreativeWork"
          }, 
          {
            "id": "https://doi.org/10.1109/vlsic.1999.797232", 
            "sameAs": [
              "https://app.dimensions.ai/details/publication/pub.1094351336"
            ], 
            "type": "CreativeWork"
          }
        ], 
        "description": "

    A receiver according to one aspect comprises a latch configured to sample a data signal according to a sampling clock signal, and a plurality of offset-compensation segments, wherein each of the segments is coupled to an internal node of the latch. Each of the segments comprises a compensation transistor, and a step-adjustment transistor coupled in series with the compensation transistor. The receiver further comprises an offset controller configured to selectively turn on one or more of the compensations transistors to reduce an offset voltage of the latch, and a bias circuit configured to apply a bias voltage to a gate of each of one or more of the step-adjustment transistors.

    ", "id": "sg:patent.US-9614502-B2", "keywords": [ "sample", "compensation scheme", "receiver", "aspect", "latch", "signal", "sampling", "plurality", "segment", "wherein", "internal node", "transistor", "controller", "voltage", "circuit", "gate" ], "name": "Accurate sample latch offset compensation scheme", "recipient": [ { "id": "https://www.grid.ac/institutes/grid.430388.4", "type": "Organization" } ], "sameAs": [ "https://app.dimensions.ai/details/patent/US-9614502-B2" ], "sdDataset": "patents", "sdDatePublished": "2019-03-07T15:30", "sdLicense": "https://scigraph.springernature.com/explorer/license/", "sdPublisher": { "name": "Springer Nature - SN SciGraph project", "type": "Organization" }, "sdSource": "s3://com.uberresearch.data.dev.patents-pipeline/full_run_10/sn-export/5eb3e5a348d7f117b22cc85fb0b02730/0000100128-0000348334/json_export_0782263a.jsonl", "type": "Patent" } ]
     

    Download the RDF metadata as:  json-ld nt turtle xml License info

    HOW TO GET THIS DATA PROGRAMMATICALLY:

    JSON-LD is a popular format for linked data which is fully compatible with JSON.

    curl -H 'Accept: application/ld+json' 'https://scigraph.springernature.com/patent.US-9614502-B2'

    N-Triples is a line-based linked data format ideal for batch operations.

    curl -H 'Accept: application/n-triples' 'https://scigraph.springernature.com/patent.US-9614502-B2'

    Turtle is a human-readable linked data format.

    curl -H 'Accept: text/turtle' 'https://scigraph.springernature.com/patent.US-9614502-B2'

    RDF/XML is a standard XML format for linked data.

    curl -H 'Accept: application/rdf+xml' 'https://scigraph.springernature.com/patent.US-9614502-B2'


     

    This table displays all metadata directly associated to this object as RDF triples.

    51 TRIPLES      14 PREDICATES      32 URIs      23 LITERALS      2 BLANK NODES

    Subject Predicate Object
    1 sg:patent.US-9614502-B2 schema:about anzsrc-for:2867
    2 schema:author Nee284da1eb9343269ba191ec23d947b4
    3 schema:citation sg:pub.10.1007/s10470-014-0410-1
    4 https://doi.org/10.1109/jssc.2013.2274904
    5 https://doi.org/10.1109/vlsic.1999.797232
    6 schema:description <p id="p-0001" num="0000">A receiver according to one aspect comprises a latch configured to sample a data signal according to a sampling clock signal, and a plurality of offset-compensation segments, wherein each of the segments is coupled to an internal node of the latch. Each of the segments comprises a compensation transistor, and a step-adjustment transistor coupled in series with the compensation transistor. The receiver further comprises an offset controller configured to selectively turn on one or more of the compensations transistors to reduce an offset voltage of the latch, and a bias circuit configured to apply a bias voltage to a gate of each of one or more of the step-adjustment transistors.</p>
    7 schema:keywords aspect
    8 circuit
    9 compensation scheme
    10 controller
    11 gate
    12 internal node
    13 latch
    14 plurality
    15 receiver
    16 sample
    17 sampling
    18 segment
    19 signal
    20 transistor
    21 voltage
    22 wherein
    23 schema:name Accurate sample latch offset compensation scheme
    24 schema:recipient https://www.grid.ac/institutes/grid.430388.4
    25 schema:sameAs https://app.dimensions.ai/details/patent/US-9614502-B2
    26 schema:sdDatePublished 2019-03-07T15:30
    27 schema:sdLicense https://scigraph.springernature.com/explorer/license/
    28 schema:sdPublisher Ne9dac27b694b4eec8bd150488d154c84
    29 sgo:license sg:explorer/license/
    30 sgo:sdDataset patents
    31 rdf:type sgo:Patent
    32 N12474729d5c143f08583adede16b8576 rdf:first N1a76b3ea56f543b0800d1229bafa5036
    33 rdf:rest rdf:nil
    34 N1a76b3ea56f543b0800d1229bafa5036 schema:name Kenneth Luis Arcudia
    35 rdf:type schema:Person
    36 Na88a0155c2ba48b09a51e9c3da0ad3e5 schema:name Minhan Chen
    37 rdf:type schema:Person
    38 Ne9dac27b694b4eec8bd150488d154c84 schema:name Springer Nature - SN SciGraph project
    39 rdf:type schema:Organization
    40 Nee284da1eb9343269ba191ec23d947b4 rdf:first Na88a0155c2ba48b09a51e9c3da0ad3e5
    41 rdf:rest N12474729d5c143f08583adede16b8576
    42 anzsrc-for:2867 schema:inDefinedTermSet anzsrc-for:
    43 rdf:type schema:DefinedTerm
    44 sg:pub.10.1007/s10470-014-0410-1 schema:sameAs https://app.dimensions.ai/details/publication/pub.1034317794
    45 https://doi.org/10.1007/s10470-014-0410-1
    46 rdf:type schema:CreativeWork
    47 https://doi.org/10.1109/jssc.2013.2274904 schema:sameAs https://app.dimensions.ai/details/publication/pub.1061331496
    48 rdf:type schema:CreativeWork
    49 https://doi.org/10.1109/vlsic.1999.797232 schema:sameAs https://app.dimensions.ai/details/publication/pub.1094351336
    50 rdf:type schema:CreativeWork
    51 https://www.grid.ac/institutes/grid.430388.4 schema:Organization
     




    Preview window. Press ESC to close (or click here)


    ...