Neural Network With Selective Error Reduction To Increase Learning Speed


Ontology type: sgo:Patent     


Patent Info

DATE

1992-07-07T00:00

AUTHORS

Toshiyuki Kohda , Yasuharu Shimeki , Shigeo Sakaue , Hiroshi Yamamoto

ABSTRACT

An improved iterative learning machine having a plurality of multi-input/single-output signal processing units connected in a hierarchical structure includes a weight coefficient change control unit which controls weight change quantities for those multi-input/single-output signal processing units having iteratively reduced errors thereby increasing the learning speed, contrary to conventional learning machines which perform a learning operation in order to minimize a square error of multi-input/single-output signal processing units in the highest hierarchy of the hierarchical structure. More... »

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